i've emulated (slightly alternated) 6502 core nintendo entertainment system, , i'm little stuck on ppu emulation.
in various documents noted ppu has 0x4000 (16kb) bytes of memory available. 2kb of internal ram, while rest on cartridge (or along lines). thing don't is, ppu makes use of pattern tables, name tables, attribute tables, background palette , sprite palette (off top of head). these things stored? know chr memory bank has size of 8kb, if rom has multiple banks of graphics memory, how ppu know in bank, of these tables/palettes find? , games don't have chr memory, , stored in prg memory. how can figure out graphical stored purpose of emulation?
edit: i've added own explanation answer, since have more experience inner workings of nes.
since asked question, i've learned ton of new things nes ppu, i'll answering question myself.
to start off, memory map of ppu looks this:
$0000 - $0fff pattern table 0 $1000 - $1fff pattern table 1 $2000 - $23bf nametable 0 $23c0 - $23ff attribute table 0 $2400 - $27bf nametable 1 $27c0 - $27ff attribute table 1 $2800 - $2bbf nametable 2 $2bc0 - $2bff attribute table 2 $2c00 - $2fbf nametable 3 $2fc0 - $2fff attribute table 3 $3000 - $3eff [0x2000 - 0x2eff] mirror $3f00 - $3f09 background palette $3f10 - $3f19 sprite palette $3f20 - $3fff palette mirror other that, there $ff (256) byte area called oam, , there's $20 (32) byte area called secondary oam.
how written to?
the pattern tables used hold graphics data of nes in patterns, i.e. whatever stored in here shows shape of sprites used. these stored in chr rom on cartridge, can written ppu memory programmer of game well. way happens explained below.
other pattern tables, other oam , secondary oam written programmer of game ppu memory. happens using registers $2006 , $2007. how?
whenever programmer wants write address in ppu memory, can storing (sta, stx, sty, , maybe other instructions well) address wants access writing $2006 twice through cpu in normal assembly. example be:
lda #$20 sta $2006 lda #$00 sta $2006 the user writes high byte of address first, , low byte. now, ppu internal 15 bit latch (not sure if latch right word) has ppu address $2000 stored in it. whenever programmer wants write address, (which, in case, starting address of first nametable) can writing value wants store in memory area memory address $2007. when writing address, written value put address in 15 bit latch, , latch incremented either 1 or 32 (decided bit 2 of value in address $2000). that's how simple is.
of course, it's not simple. addresses $2000 - $2007 called ppu's memory mapped registers, , they're called because they're in cpu's memory. they're located there because cpu , ppu can't access each other's memory directly, cpu has find gateway ppu's memory, , addresses it. there lot of strange exceptions , quirks these registers, , they're explained here.
other those, there's still aforementioned oam , secondary oam, whole different thing, , should explained thoroughly reading viable sources, rather quick explanation.
it's better read mentioned source (again, here) full understanding, quick explanation curious , have basic understanding of kind of stuff.
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